A Hybrid Element Method for Calculation of Capacitances from the Layout of Integrated Circuits
نویسندگان
چکیده
We describe a hybrid method which combines the boundary element method (BEM) and the finite element method (FEM) to compute circuit models for layout dependent capacitances. The method can handle irregularities in the stratification of the layout of the integrated circuits (IC’s). New in the method are the models for the interface between the regions where the BEM and the FEM are applied. We show fast convergence of the method and give 2D and 3D simulation results which confirm its validity.
منابع مشابه
A Hybrid Element Method for Capacitance Extraction in Vlsi Layout Verification System
In this paper we describe a hybrid element method which combines the boundary element method (BEM) and the finite element method (FEM) to calculate circuit models for layout dependent capacitances. The method can handle irregularities in the stratification of the layout of the integrated circuits (IC’s). We present a stand-alone extraction program which we developed for validation and testing p...
متن کاملModeling and extraction of interconnect capacitances for multilayer VLSI circuits
We report an accurate and practical method of estimating interconnect capacitances for a given circuit layout. The method extraction of the complete circuit level capacitances at each node in the circuit. The layout geometry is reduced into base elements that consist of different vertical profiles at each node in the layout. Accurate analytical models are developed for calculating capacitances ...
متن کاملHierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchical capacitance extraction method that efficiently extracts 3D interconnect capacitances of large regular layout structures such as RAMs and array multipliers. The method is based on a 3D capacitance extraction method t...
متن کاملCircuit Models for the Hybrid Element Method
In this paper, we describe a new hybrid method which combines the boundary element method (BEM) and the nite element method (FEM) to calculate the circuit models for layout dependent capacitances in VLSI circuits. The hybrid method which we present does more than solving a particular eld problem, it produces a good physical circuit model for the interface between the regions where the BEM and t...
متن کامل3-Dimensional Finite Element Modeling of Integrated Circuit Capacitances
This chapter presents an accurate and efficient method for determination of parasitic capacitances in submicron integrated circuits. The method uses a 3-D finite element model in which the conductor charges are approximated by a piece-wise linear function on a web of edges located on the surface of the conductors. This yields a system of Green’s function integral equations that is solved by a n...
متن کامل